Tester Structure Expression Language and Its Application to the Environment for VLSI Tester Program Development

Masayuki Sato, Hiroki Wakamatsu, Masayuki Arai, Kenichi Ichino, Kazuhiko Iwasaki and Takeshi Asakawa
Volume: 4, No: 4, Page: 121 ~ 132, Year: 2008
10.3745/JIPS.2008.4.4.121
Keywords: VLST test, VLSI tester, ATE, tester language, GTL, Tester selection tool
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Abstract
VLSI chips have been tested using various automatic test equipment (ATE). Although each ATE has a similar structure, the language for ATE is proprietary and it is not easy to convert a test program for use among different ATE vendors. To address this difficulty we propose a tester structure expression language, a tester language with a novel format. The developed language is called the general tester language (GTL). Developing an interpreter for each tester, the GTL program can be directly applied to the ATE without conversion. It is also possible to select a cost-effective ATE from the test program, because the program expresses the required ATE resources, such as pin counts, measurement accuracy, and memory capacity. We describe the prototype environment for the GTL and the tester selection tool. The software size of the prototype is approximately 27,800 steps and 15 manmonths were required. Using the tester selection tool, the number of man-hours required in order to select an ATE could be reduced to 1/10. A GTL program was successfully executed on actual ATE.

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Cite this article
IEEE Style
Masayuki Sato, Hiroki Wakamatsu, Masayuki Arai, Kenichi Ichino, Kazuhiko Iwasaki and Takeshi Asakawa, "Tester Structure Expression Language and Its Application to the Environment for VLSI Tester Program Development," Journal of Information Processing Systems, vol. 4, no. 4, pp. 121~132, 2008. DOI: 10.3745/JIPS.2008.4.4.121.

ACM Style
Masayuki Sato, Hiroki Wakamatsu, Masayuki Arai, Kenichi Ichino, Kazuhiko Iwasaki and Takeshi Asakawa, "Tester Structure Expression Language and Its Application to the Environment for VLSI Tester Program Development," Journal of Information Processing Systems, 4, 4, (2008), 121~132. DOI: 10.3745/JIPS.2008.4.4.121.